The present invention relates generally to the field of computer simulation of analog and mixed-signal circuits and systems. (Modeling of components, circuits or systems generally described in terms of purely discrete time and discrete value systems, commonly known as digital systems, is outside the scope of the present invention.)
Simulation methods and apparatus are useful in increasing design productivity in a wide variety of applications because design defects can be detected prior to construction of the actual apparatus being simulated. Simulation of digital systems has progressed rapidly over the last decade. This growth has been spurred by the development of standard languages such as VHDL and Verilog for modeling digital devices at both the structural and behavioral levels. The former has gained the widest acceptance in large part due to the U.S. Defense Department's mandate that new designs be presented in VHDL form in order that the design be technologically independent. This standardization has allowed companies to invest large resources in the development of models. These models can then be reused and/or sold to allow for rapid prototyping and simulation of new designs, further increasing productivity and efficiency. The same cannot be said in the analog and particularly the mixed-signal arena.
Despite recent progress towards a standard analog hardware description language to facilitate model development, the relative paucity of analog and mixed signal models is still a major barrier to potential increases in design productivity. However, simply increasing the size of model libraries is of limited usefulness, as specific models typically lack portability and reusability. Moreover, since the effective robustness of circuit and system level simulation is determined to a large degree by the model-simulator interaction, simulation tools and modeling tools must be considered together to enable substantial improvements.
The lack of a sufficient quantity and quality of affordable models to adequately represent analog and mixed-signal systems that need to be simulated can be addressed by reducing the expertise required to create robust software components (i.e., models). Presently, model development is done manually and requires significant modeling and computer language expertise. Simulation problems presently are resolved by trial and error adjustment of simulator control settings to find a combination that works for each analysis applied to a design. Moreover, the introduction of a standard description language such as IEEE standard 1076.1 analog extension to VHDL ("VHDL-A") will merely exacerbate these problems if no modeling tools are available and no improvements are made to the simulator. Users will be faced with issues of porting existing models from proprietary languages to VHDL-A. Also, the proposed VHDL-A standard only standardizes the description of a model, not the algorithms and methods used to perform simulation.
In the area of model robustness, intuitive tools are needed to perform model diagnostics that will help the modeler visualize both model characteristics and its interaction with the simulator. Moreover, improvement is needed in tools for configuring model-specific simulation controls. This is presently done on an ad hoc basis where availability of an experienced expert is often a prerequisite to timely success. What is needed is methodology to automate configuration of simulation controls.
When a design calls for a model that is either unavailable or inadequate, it is useful for designers who are typically model users to have modeling tools that are simple enough to create or adjust models to meet an immediate need. It is also useful for model suppliers to have adequate modeling tools to create or repair models more efficiently. Presently, the lack of adequate modeling tools makes this a labor intensive process because focus must be placed on implementation details rather than model requirements. As a result, the modeling test takes too long and the quality of the completed model is sacrificed.
The earliest model creations paradigm was strictly text based, requiring the user to specify topologies and mathematical relationships in a strictly defined syntax, for example in early versions of SPICE. Recently, others have suggested removing the language or programming barrier by developing an environment that is a purely graphical model description for analog and mixed signal models. Even this approach fails to provide the flexibility and ease-of-use necessary for efficient model creation.
In the area of simulation robustness, the need remains to provide tools that allow a non-expert user to improve simulation performance and identify and resolve simulation problems. New tools that assist in locating and analyzing the cause of simulation failures will lead to improved efficiency in the overall design process.